Electroless-catalyst doped-mold materials for integrated-circuit die packaging architectures
US11227849B2 · kind B2 · utility
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17Claims
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Key dates
| Filing date | Sep 25, 2019 |
| Grant date | Jan 18, 2022 |
| Priority date | — |
| Expiry date | Dec 22, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2225/06548
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Disclosed embodiments include a catalyst-doped mold interconnect system, where activated catalyst particles that line via and trace corridors, are used for electroless-plating formation of both liners and vias and traces that also electrolessly plate onto the liners. Photolithographically formed interconnects can be mingled with laser-ablation form-factor vias and traces within a single stratum of a catalyst doped mold interconnect system.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.