Patent · US Active

Digital frequency synthesizer with robust injection locked divider

US11233520B2 · kind B2 · utility

0Cited by

7References

20Claims

0Family size

Assignee

Infineon Technologies AG · DE

Inventors

Dmytro Cherniak · Villach, AT
Salvatore Levantino · Marsala, IT
Marc Tiebout · Birkenfeld, DE
Roberto Nonis · Finkenstein, AT

Key dates

Filing date	Oct 16, 2020
Grant date	Jan 25, 2022
Priority date	—
Expiry date	Oct 16, 2040

Classification

Technology area (CPC H)Electricity
CPC primaryH03L2207/50
WIPO fieldBasic communication processes
WIPO sectorElectrical engineering

Abstract

A phased-locked loop (PLL) circuit with an injection locked digital digitally controlled oscillator (ILD) that has an ILD control input element, an ILD injection input element and an ILD output element. The PLL circuit also includes an adaptive control unit (ACU), wherein the ACU is configured to receive an error signal and is configured to output an ILD control word. The ILD control input element is configured to receive the ILD control word, and the ILD control word may set a natural oscillation frequency of the ILD. The ILD is further configured to output a first output signal from the ILD output element, where the natural oscillation frequency may set a frequency of the first output signal.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.