Patent · US Active

Multicore shared cache operation engine

US11237968B2 · kind B2 · utility

2Cited by
6References
20Claims
0Family size

Assignee

Inventors

Key dates

Filing dateOct 15, 2019
Grant dateFeb 1, 2022
Priority date
Expiry dateApr 24, 2040

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F2212/657
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

Techniques including receiving configuration information for a trigger control channel of the one or more trigger control channels, the configuration information defining a first one or more triggering events, receiving a first memory management command, store the first memory management command, detecting a first one or more triggering events, and triggering the stored first memory management command based on the detected first one or more triggering events.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.