Inventor · Dallas, TX, US

Kai Chirca

119Patents
8h-index
25Co-inventors
80Inventor score

Filing activity: Mar 3, 2005 → Apr 29, 2024

Most-cited inventions

PatentTitleAreaCited byStatus
US9606803B2 Highly integrated scalable, flexible DSP megamodule architecture Electricity 75 Active
US9904645B2 Multicore bus architecture with non-blocking high performance transaction credit system Electricity 55 Active
US9298665B2 Multicore, multibank, fully concurrent coherence controller Emerging Cross-Sectional Technologies 32 Active
US8732370B2 Multilayer arbitration for access to multiple destinations Emerging Cross-Sectional Technologies 31 Active
US9652404B2 Multicore, multibank, fully concurrent coherence controller Emerging Cross-Sectional Technologies 31 Active
US9152586B2 Coherent cache system with optional acknowledgement for out-of-order coherence transaction completion Physics 29 Active
US11372646B2 Exit history based branch prediction Physics 11 Active
US10061675B2 Streaming engine with deferred exception reporting Physics 8 Active
US8601221B2 Speculation-aware memory controller arbiter Emerging Cross-Sectional Technologies 8 Active
US10162641B2 Highly integrated scalable, flexible DSP megamodule architecture Electricity 8 Active
US9075928B2 Hazard detection and elimination for coherent endpoint allowing out-of-order execution Emerging Cross-Sectional Technologies 5 Active
US10732945B1 Nested loop control Physics 5 Active
US7349938B2 Arithmetic circuit with balanced logic levels for low-power operation Physics 4 Expired
US9489314B2 Multi-master cache coherent speculation aware memory controller with advanced arbitration, virtualization and EDC Emerging Cross-Sectional Technologies 4 Active
US8473689B2 Predictive sequential prefetching for data caching Physics 4 Active
US10037439B2 Secure master and secure guest endpoint security firewall Emerging Cross-Sectional Technologies 4 Active
US10802974B2 Virtual network pre-arbitration for deadlock avoidance and enhanced performance Physics 4 Active
US9898415B2 Slot/sub-slot prefetch architecture for multiple memory requestors Emerging Cross-Sectional Technologies 3 Active
US9213656B2 Flexible arbitration scheme for multi endpoint atomic accesses in multicore systems Physics 3 Active
US10560428B2 Flexible hybrid firewall architecture Electricity 3 Active
US8732551B2 Memory controller with automatic error detection and correction Emerging Cross-Sectional Technologies 3 Active
US11036648B2 Highly integrated scalable, flexible DSP megamodule architecture Electricity 3 Active
US10990398B2 Mechanism for interrupting and resuming execution on an unprotected pipeline processor Physics 2 Active
US11237968B2 Multicore shared cache operation engine Physics 2 Active
US8706969B2 Variable line size prefetcher for multiple memory requestors Emerging Cross-Sectional Technologies 2 Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.