Semiconductor package
US11239148B2 · kind B2 · utility
0Cited by
15References
16Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Nov 15, 2019 |
| Grant date | Feb 1, 2022 |
| Priority date | — |
| Expiry date | Jan 29, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2224/18
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor package includes a core layer formed of a ferromagnetic material, and includes a frame passing through the core layer and having a through-hole, a semiconductor chip disposed in the through-hole of the frame, and having an active surface on which a connection pad is disposed, and an inactive surface opposite to the active surface, an encapsulant covering at least a portion of the semiconductor chip, and a first connection structure including a first redistribution layer disposed on the active surface of the semiconductor chip and electrically connected to the connection pad.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.