Valley spin hall effect based non-volatile memory
US11250896B2 · kind B2 · utility
2Cited by
8References
19Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 23, 2020 |
| Grant date | Feb 15, 2022 |
| Priority date | — |
| Expiry date | Jun 23, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10N52/80
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory cell is disclosed which includes a conductive layer, an insulating layer disposed atop the conducting layer, a semiconductor layer disposed atop the insulating layer, a first electrode coupled to the semiconductor layer, a second electrode coupled to the semiconductor layer, wherein the first and second electrodes are separated from one another and wherein the semiconductor layer extends beyond the first and second electrodes forming a first wing, a third electrode coupled to the conductive layer, a first magnetic tunnel junction (MTJ) disposed on the first wing, and a first read electrode coupled to the first MTJ.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.