Memory devices and methods of manufacture thereof
US11251314B2 · kind B2 · utility
0Cited by
7References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Aug 27, 2020 |
| Grant date | Feb 15, 2022 |
| Priority date | — |
| Expiry date | Aug 27, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B41/60
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Representative methods of manufacturing memory devices include forming a transistor with a gate disposed over a workpiece, and forming an erase gate with a tip portion extending towards the workpiece. The transistor includes a source region and a drain region disposed in the workpiece proximate the gate. The erase gate is coupled to the gate of the transistor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.