Current monitor for a memory device
US11257534B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 21, 2020 |
| Grant date | Feb 22, 2022 |
| Priority date | — |
| Expiry date | Oct 21, 2040 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2029/5006
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Methods, systems, and devices for a current monitor for a memory device are described. A memory device may monitor potential degradation of memory cells on the device by monitoring the amount of current drawn by one or more memory cells. As the memory cells degrade, the current supplied to the memory cells may change (e.g., increase due to additional leakage current. The memory device may indirectly monitor changes in the current supplied to the memory cells by monitoring a voltage of a node of a transistor that controls the amount of current supplied to the array of memory cells. The voltage at the control node may be compared to a reference voltage to determine whether the two voltages differ by a threshold amount, indicating that the memory cells are drawing more current. The memory device may output a status indicator when the voltages differ, for example, by the threshold amount.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.