Aaron P. Boehm
119Patents
3h-index
21Co-inventors
64Inventor score
Filing activity: Dec 4, 2012 → Jun 13, 2024
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US11755409B2 | Internal error correction for memory devices | Physics | 6 | Active |
| US10818359B2 | Apparatuses and methods for organizing data in a memory device | Physics | 4 | Active |
| US11061771B2 | Extended error detection for a memory device | Physics | 3 | Active |
| US11054995B2 | Row hammer protection for a memory device | Emerging Cross-Sectional Technologies | 3 | Active |
| US11953988B2 | Error correction memory device with fast data access | Electricity | 3 | Active |
| US11100998B2 | Apparatuses and methods for organizing data in a memory device | Physics | 3 | Active |
| US10779145B2 | Wirelessly utilizable memory | Electricity | 3 | Active |
| US10838732B2 | Apparatuses and methods for ordering bits in a memory device | Physics | 2 | Active |
| US10785786B2 | Remotely executable instructions | Electricity | 2 | Active |
| US11126498B2 | Memory device with configurable error correction modes | Physics | 2 | Active |
| US11169730B2 | Scrub rate control for a memory device | Physics | 2 | Active |
| US10880361B2 | Sharing a memory resource among physically remote entities | Electricity | 2 | Active |
| US11436082B2 | Internal error correction for memory devices | Physics | 2 | Active |
| US9159397B2 | Methods and apparatuses for refreshing memory | Physics | 2 | Active |
| US11269648B2 | Apparatuses and methods for ordering bits in a memory device | Physics | 2 | Active |
| US11182244B2 | Error correction management for a memory device | Physics | 2 | Active |
| US11307929B2 | Memory device with status feedback for error correction | Physics | 2 | Active |
| US11425740B2 | Method and device capable of executing instructions remotely in accordance with multiple logic units | Electricity | 1 | Active |
| US11579784B2 | Refresh counters in a memory system | Physics | 1 | Active |
| US11789818B2 | Coordinated error correction | Electricity | 1 | Active |
| US11363433B2 | Memory pooling between selected memory resources on vehicles or base stations | Electricity | 1 | Active |
| US11249847B2 | Targeted command/address parity low lift | Physics | 1 | Active |
| US11782721B2 | Apparatuses and methods for ordering bits in a memory device | Physics | 1 | Active |
| US10437557B2 | Determination of a match between data values stored by several arrays | Physics | 1 | Active |
| US11710524B2 | Apparatuses and methods for organizing data in a memory device | Physics | 1 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.