Memory cell including multi-level sensing
US11264094B2 · kind B2 · utility
0Cited by
2References
19Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 5, 2018 |
| Grant date | Mar 1, 2022 |
| Priority date | — |
| Expiry date | Mar 5, 2038 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2213/71
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An embodiment of a semiconductor apparatus may include technology to convert an analog voltage level of a memory cell of a multi-level memory to a multi-bit digital value, and determine a single-bit value of the memory cell based on the multi-bit digital value. Some embodiments may also include technology to track a temporal history of accesses to the memory cell for a duration in excess of ten seconds, and determine the single-bit value of the memory cell based on the multi-bit digital value and the temporal history. Other embodiments are disclosed and claimed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.