Bruce Querbach
28Patents
5h-index
99Co-inventors
68Inventor score
Filing activity: Mar 31, 2003 → May 22, 2019
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US6826100B2 | Push button mode automatic pattern switching for interconnect built-in self test | Physics | 20 | Expired |
| US7139957B2 | Automatic self test of an integrated circuit component via AC I/O loopback | Physics | 19 | Expired |
| US8868992B2 | Robust memory link testing using memory controller | Physics | 10 | Active |
| US9818457B1 | Extended platform with additional memory module slots per CPU socket | Electricity | 6 | Active |
| US7228515B2 | Methods and apparatuses for validating AC I/O loopback tests using delay modeling in RTL simulation | Physics | 6 | Expired |
| US10163508B2 | Supporting multiple memory types in a memory slot | Emerging Cross-Sectional Technologies | 5 | Active |
| US9691492B1 | Determination of demarcation voltage for managing drift in non-volatile memory devices | Physics | 4 | Active |
| US10014036B1 | Low power and area efficient memory receiver | Physics | 4 | Active |
| US10198333B2 | Test, validation, and debug architecture | Physics | 4 | Active |
| US9977075B1 | Integrated circuit reliability assessment apparatus and method | Physics | 3 | Active |
| US7501863B2 | Voltage margining with a low power, high speed, input offset cancelling equalizer | Electricity | 3 | Active |
| US9548137B2 | Integrated circuit defect detection and repair | Physics | 2 | Active |
| US7480360B2 | Regulating a timing between a strobe signal and a data signal | Electricity | 2 | Active |
| US9659626B1 | Memory refresh operation with page open | Physics | 2 | Active |
| US9922725B2 | Integrated circuit defect detection and repair | Physics | 1 | Active |
| US9953694B2 | Memory controller-controlled refresh abort | Physics | 1 | Active |
| US9564245B2 | Integrated circuit defect detection and repair | Physics | 1 | Active |
| US10163502B2 | Selective performance level modes of operation in a non-volatile memory | Physics | 1 | Active |
| US10216657B2 | Extended platform with additional memory module slots per CPU socket and configured for increased performance | Physics | 1 | Active |
| US11264094B2 | Memory cell including multi-level sensing | Physics | 0 | Active |
| US9824743B2 | Memory refresh operation with page open | Physics | 0 | Active |
| US11074151B2 | Processor having embedded non-volatile random access memory to support processor monitoring software | Emerging Cross-Sectional Technologies | 0 | Active |
| US10242717B2 | Extended platform with additional memory module slots per CPU socket | Electricity | 0 | Active |
| US11182158B2 | Technologies for providing adaptive memory media management | Emerging Cross-Sectional Technologies | 0 | Active |
| US11620358B2 | Technologies for performing macro operations in memory | Emerging Cross-Sectional Technologies | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.