Patent · US Active

Semiconductor device having metal interconnects with different thicknesses

US11264329B2 · kind B2 · utility

0Cited by

2References

15Claims

0Family size

Assignee

Intel Corporation · US

Inventors

Kinyip Phoa · Beaverton, US
Jui-Yen Lin · Hillsboro, US
Nidhi Nidhi · Hillsboro, US
Chia-Hong Jan · Portland, US

Key dates

Filing date	Apr 1, 2016
Grant date	Mar 1, 2022
Priority date	—
Expiry date	Feb 14, 2038

Classification

Technology area (CPC H)Electricity
CPC primaryH01L23/5386
WIPO fieldSemiconductors
WIPO sectorElectrical engineering

Abstract

An apparatus includes a first metal layer, a second metal layer and a dielectric material. The first metal layer has a first thickness and a second thickness less than the first thickness, and the first metal layer comprises a first interconnect having a first thickness. The dielectric material extends between the first and second metal layers and directly contacts the first and second metal layers. The dielectric material includes a via that extends through the dielectric material. A metal material of the via directly contacts the first interconnect and the second metal layer.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.