Kinyip Phoa
24Patents
4h-index
36Co-inventors
59Inventor score
Filing activity: Jun 20, 2014 → Jan 9, 2024
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US11018264B1 | Three-dimensional nanoribbon-based logic | Electricity | 10 | Active |
| US11087832B1 | Three-dimensional nanoribbon-based static random-access memory | Electricity | 7 | Active |
| US10312367B2 | Monolithic integration of high voltage transistors and low voltage non-planar transistors | Electricity | 7 | Active |
| US11257822B2 | Three-dimensional nanoribbon-based dynamic random-access memory | Electricity | 5 | Active |
| US11824116B2 | Gate-all-around integrated circuit structures having devices with channel-to-substrate electrical contact | Electricity | 2 | Active |
| US11799009B2 | Gate-all-around integrated circuit structures having adjacent structures for sub-fin electrical contact | Electricity | 2 | Active |
| US11908856B2 | Gate-all-around integrated circuit structures having devices with source/drain-to-substrate electrical contact | Performing Operations; Transporting | 2 | Active |
| US10229866B2 | On-chip through-body-via capacitors and techniques for forming same | Electricity | 1 | Active |
| US11139300B2 | Three-dimensional memory arrays with layer selector transistors | Electricity | 1 | Active |
| US12058849B2 | Three-dimensional nanoribbon-based dynamic random-access memory | Electricity | 0 | Active |
| US11837641B2 | Gate-all-around integrated circuit structures having adjacent deep via substrate contacts for sub-fin electrical contact | Electricity | 0 | Active |
| US10505034B2 | Vertical transistor using a through silicon via gate | Electricity | 0 | Active |
| US11830818B2 | Semiconductor device having metal interconnects with different thicknesses | Electricity | 0 | Active |
| US10903372B2 | Metal-oxide-polysilicon tunable resistor for flexible circuit design and method of fabricating same | Electricity | 0 | Active |
| US12272737B2 | Gate-all-around integrated circuit structures having adjacent structures for sub-fin electrical contact | Electricity | 0 | Active |
| US11973105B2 | Embedded precision resistor for non-planar semiconductor device architectures | Electricity | 0 | Active |
| US11393934B2 | FinFET based capacitors and resistors and related apparatuses, systems, and methods | Electricity | 0 | Active |
| US11264329B2 | Semiconductor device having metal interconnects with different thicknesses | Electricity | 0 | Active |
| US12114479B2 | Three-dimensional memory arrays with layer selector transistors | Electricity | 0 | Active |
| US10158034B2 | Through silicon via based photovoltaic cell | Emerging Cross-Sectional Technologies | 0 | Active |
| US12402349B2 | Gate-all-around integrated circuit structures having devices with channel-to-substrate electrical contact | Electricity | 0 | Active |
| US12288789B2 | Gate-all-around integrated circuit structures having devices with source/drain-to-substrate electrical contact | Performing Operations; Transporting | 0 | Active |
| US11737362B2 | Harvesting energy in an integrated circuit using the seebeck effect | Electricity | 0 | Active |
| US11621334B2 | Non-planar integrated circuit structures having asymmetric source and drain trench contact spacing | Electricity | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.