Semiconductor device including dummy gate patterns and manufacturing method thereof
US11264482B2 · kind B2 · utility
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3References
20Claims
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Key dates
| Filing date | Sep 17, 2019 |
| Grant date | Mar 1, 2022 |
| Priority date | — |
| Expiry date | Nov 20, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D89/10
Abstract
A semiconductor device may include: a dummy gate structure including a first gate pattern in which dummy gate lines extending in one direction are connected to each other on a substrate, and a second gate pattern in which dummy gate lines extending in the one direction are connected to each other on the same line with the first gate pattern; and a third gate pattern extending in parallel with the dummy gate structure on one side of the dummy gate structure.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.