RF DAC with low noise spectral density and mismatch spurs
US11265001B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Dec 8, 2020 |
| Grant date | Mar 1, 2022 |
| Priority date | — |
| Expiry date | Dec 8, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/742
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A DAC current steering circuit includes first and second transistors, respectively coupled to first and second outputs via first and second nodes at their drains, and source coupled to each other and to ground. A gate of the first transistor is coupled to a data input (D), and a gate of the second transistor coupled to a complement of the data input (DB). The circuit further includes first and second bleeder transistors, whose drains are respectively coupled to the first and second nodes, and whose sources are coupled together at a third node, the third node coupled to ground, and first and second bleeder switching transistors, whose drains and sources are each coupled to the third node, a gate of the first bleeder switching transistor coupled to a switching input (S) and a gate of the second bleeder switching transistor coupled to a complement of the switching input (SB).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.