Integrated circuit and method of forming same and a system
US11275886B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 20, 2021 |
| Grant date | Mar 15, 2022 |
| Priority date | — |
| Expiry date | Apr 20, 2041 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2119/12
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A multi-bit flip-flop includes a first flip-flop, a second flip-flop, a first inverter, and a second inverter. The first flip-flop has a first driving capability. The second flip-flop has a second driving capability different from the first driving capability. The first inverter is configured to receive a first clock signal on a first clock pin, and is configured to generate a second clock signal inverted from the first clock signal. The second inverter is coupled to the first inverter, is configured to receive the second clock signal, and is configured to generate a third clock signal inverted from the second clock signal. The first flip-flop and the second flip-flop are configured to share at least the first clock pin.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.