Sheng-Hsiung Chen
129Patents
15h-index
94Co-inventors
89Inventor score
Filing activity: Apr 3, 1995 → Jun 18, 2024
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US6399486B1 | Method of improved copper gap fill | Electricity | 66 | Expired |
| US6191023A | Method of improving copper pad adhesion | Electricity | 58 | Expired |
| US5635258A | Method of forming a boron-doped diamond film by chemical vapor deposition | Chemistry; Metallurgy | 53 | Expired |
| US6313003A | Fabrication process for metal-insulator-metal capacitor with low gate resistance | Electricity | 40 | Expired |
| US6560862B1 | Modified pad for copper/low-k | Emerging Cross-Sectional Technologies | 35 | Expired |
| US6489684B1 | Reduction of electromigration in dual damascene connector | Electricity | 29 | Expired |
| US6303498A | Method for preventing seed layer oxidation for high aspect gap fill | Electricity | 28 | Expired |
| US5660894A | Process for depositing diamond by chemical vapor deposition | Chemistry; Metallurgy | 26 | Expired |
| US6420258B1 | Selective growth of copper for advanced metallization | Electricity | 26 | Expired |
| US6350667B1 | Method of improving pad metal adhesion | Electricity | 24 | Expired |
| US6466427B1 | Microelectronic capacitor structure compatible with copper containing microelectronic conductor layer processing | Electricity | 23 | Expired |
| US6518166B1 | Liquid phase deposition of a silicon oxide layer for use as a liner on the surface of a dual damascene opening in a low dielectric constant layer | Electricity | 22 | Expired |
| US6872627B2 | Selective formation of metal gate for dual gate oxide application | Emerging Cross-Sectional Technologies | 22 | Expired |
| US6384442B1 | Fabrication process for metal-insulator-metal capacitor with low gate resistance | Electricity | 20 | Expired |
| US6303459A | Integration process for Al pad | Emerging Cross-Sectional Technologies | 15 | Expired |
| US6818533B2 | Epitaxial plasma enhanced chemical vapor deposition (PECVD) method providing epitaxial layer with attenuated defects | Electricity | 15 | Expired |
| US7026721B2 | Method of improving copper pad adhesion | Electricity | 12 | Expired |
| US6573187B1 | Method of forming dual damascene structure | Electricity | 11 | Expired |
| US6235637A | Method for marking a wafer without inducing flat edge particle problem | Electricity | 8 | Expired |
| US6660577B2 | Method for fabricating metal gates in deep sub-micron devices | Electricity | 5 | Expired |
| US11275886B2 | Integrated circuit and method of forming same and a system | Physics | 5 | Active |
| US10262981B2 | Integrated circuit, system for and method of forming an integrated circuit | Electricity | 5 | Active |
| US10396063B2 | Circuit with combined cells and method for manufacturing the same | Physics | 5 | Active |
| US10552568B2 | Method of modifying cell and global connection routing method | Physics | 5 | Active |
| US10990745B2 | Integrated circuit and method of forming same and a system | Physics | 5 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.