Gate controlled lateral bipolar junction/heterojunction transistors
US11276770B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 5, 2019 |
| Grant date | Mar 15, 2022 |
| Priority date | — |
| Expiry date | Apr 20, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D10/311
Abstract
The present disclosure relates to semiconductor structures and, more particularly, to gate controlled transistors and methods of manufacture. The structure includes: an emitter region; a collector region; base regions on opposing sides of the emitter region and the collector region; and a gate structure composed of a body region and leg regions, the body region being located between the base regions on opposing sides of the emitter region and the collector region, and the leg regions isolating the base regions from both the emitter region and the collector region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.