Contamination control in semiconductor manufacturing systems
US11282728B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 10, 2019 |
| Grant date | Mar 22, 2022 |
| Priority date | — |
| Expiry date | Oct 19, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/67739
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The present disclosure relates to a contamination controlled semiconductor processing system. The contamination controlled semiconductor processing system includes a processing chamber, a contamination detection system, and a contamination removal system. The processing chamber is configured to process a wafer. The contamination detection system is configured to determine whether a contamination level on a surface of the door is greater than a baseline level. The contamination removal system is configured to remove contaminants from the surface of the door in response to the contamination level being greater than the baseline level.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.