Flash memory block retirement policy
US11288149B2 · kind B2 · utility
0Cited by
18References
19Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Oct 7, 2020 |
| Grant date | Mar 29, 2022 |
| Priority date | — |
| Expiry date | Oct 7, 2040 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/0483
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Devices and techniques for a flash memory block retirement policy are disclosed herein. In an example embodiment, a first memory block is provisionally removed from service in response to encountering read errors in the first memory block. Memory pages of the first memory block are tested in a second mode comprising reading memory pages at different read voltages. A raw bit error rate (RBER) or a read window budget (RWB) is determined for memory pages at the different read voltages and the provisionally removed first memory block is returned to service or retired based on the determined RBER or the RWB.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.