Semiconductor die including edge ring structures and methods for making the same
US11289388B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 2, 2020 |
| Grant date | Mar 29, 2022 |
| Priority date | — |
| Expiry date | Apr 2, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B43/40
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor die includes semiconductor devices located over a substrate, at least one dielectric material portion that laterally surrounds the semiconductor devices, and interconnect-level dielectric material layers. At least one edge seal ring structure can be provided, each including a composite edge seal via structure and a set of metal barrier structures. The composite edge seal via structure includes a metallic material layer and a dielectric fill material portion. Alternatively or additionally, at least one slit ring structure can laterally surround the semiconductor devices and the metal interconnect structures. Each slit ring structure continuously extends through each of the interconnect-level dielectric material layers and into the at least one dielectric material portion, and includes at least one dielectric material.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.