Semiconductor package
US11289456B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 27, 2020 |
| Grant date | Mar 29, 2022 |
| Priority date | — |
| Expiry date | Aug 4, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/3511
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor package includes a frame having a through-opening, a first semiconductor chip disposed in the through-opening and having a first active surface on which a first connection pad is disposed and a first inactive surface opposing the first active surface, a second semiconductor chip disposed on the first semiconductor chip and having a second active surface on which a second connection pad is disposed and a second inactive surface opposing the second active surface, first and second bumps electrically connected to the first and second connection pads, respectively, first and second dummy bumps disposed on a same level as levels of the first and second bumps, respectively, first and second posts electrically connected to the first and second bumps, respectively, a connection member including a redistribution layer electrically connected to each of the first and second posts, and a dummy post disposed between the frame and the connection member.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.