Patent · US Active

Dielet design techniques

US11295053B2 · kind B2 · utility

1Cited by

30References

20Claims

0Family size

Assignee

Arm Limited · GB

Inventors

Xiaoqing Xu · Austin, US
Brian Tracy Cline · Austin, US
Saurabh Sinha · Danbury, US
Stephen Lewis Moore · Austin, US
Mudit Bhargava · Austin, US

Key dates

Filing date	Sep 12, 2019
Grant date	Apr 5, 2022
Priority date	—
Expiry date	Sep 12, 2039

Classification

Technology area (CPC G)Physics
CPC primaryG06F2115/12
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

Various implementations described herein are directed to an integrated circuit (IC) having a design that is severable into multiple sub-circuits having input-output (IO) ports. The integrated circuit (IC) may include multiple physical electrical connections that are adapted to electrically interconnect the IO ports of the multiple sub-circuits to operate as the IC, and the IO ports have three-dimensional (3D) geometric position information associated therewith.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.