Semiconductor device
US11296078B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 4, 2019 |
| Grant date | Apr 5, 2022 |
| Priority date | — |
| Expiry date | Jan 2, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/038
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device includes a plurality of semiconductor patterns that are sequentially stacked and spaced apart from each other on a substrate, and a gate electrode on the plurality of semiconductor patterns. The gate electrode includes a capping pattern and a work function pattern that are sequentially stacked on the plurality of semiconductor patterns. The capping pattern includes a first metal nitride layer including a first metal element, and a second metal nitride layer including a second metal element whose work function is greater than a work function of the first metal element. The first metal nitride layer is disposed between the second metal nitride layer and the plurality of semiconductor patterns. The first metal nitride layer is thinner than the second metal nitride layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.