Patent · US Active

Performing sub-logical page write operations in non-volatile random access memory (NVRAM) using pre-populated read-modify-write (RMW) buffers

US11301170B2 · kind B2 · utility

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1References
20Claims
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Key dates

Filing dateMar 5, 2020
Grant dateApr 12, 2022
Priority date
Expiry dateSep 24, 2040

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F3/0689
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

A computer-implemented method, according to one embodiment, includes: receiving a sub-logical page read command for data stored in NVRAM at a first LBA, and creating a searchable entry which includes the first LBA. Data read from the NVRAM is also received, where the received data corresponds to a given LBA. In response to determining that the given LBA matches the first LBA of the searchable entry, a copy of the received data is stored in a buffer. Moreover, in response to determining that a received sub-logical page write command is for data stored in the NVRAM at the first LBA, the copy of the received data in the buffer is coalesced with data included in the sub-logical page write command to form a full-logical page write. Furthermore, instructions to perform the full-logical page write in the NVRAM are sent.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.