Inventor · Plainfield, IL, US

Kevin E. Sallese

19Patents
4h-index
24Co-inventors
60Inventor score

Filing activity: Dec 16, 1997 → Mar 3, 2022

Most-cited inventions

PatentTitleAreaCited byStatus
US9298549B2 Read buffer architecture supporting integrated XOR-reconstructed and read-retry for non-volatile random access memory (NVRAM) systems Physics 11 Active
US7430706B1 Diagonal interleaved parity calculator Electricity 10 Active
US9400745B2 Physical address management in solid state memory Physics 6 Active
US10489086B1 Reducing read errors by performing mitigation reads to blocks of non-volatile memory Physics 5 Active
US7191388B1 Fast diagonal interleaved parity (DIP) calculator Electricity 2 Expired
US10770155B2 Determining a read apparent voltage infector page and infected page Physics 1 Active
US10552243B2 Corrupt logical block addressing recovery scheme Physics 1 Active
US6075785A Apparatus and method for providing memory address interchanging for high speed memory accesses Electricity 1 Expired
US11301170B2 Performing sub-logical page write operations in non-volatile random access memory (NVRAM) using pre-populated read-modify-write (RMW) buffers Physics 0 Active
US11880299B2 Calendar based flash command scheduler for dynamic quality of service scheduling and bandwidth allocations Physics 0 Active
US9857977B2 Physical address management in solid state memory Physics 0 Active
US11036427B2 Using content addressable memory to perform read-modify-write operations in non-volatile random access memory (NVRAM) Physics 0 Active
US9996266B2 Physical address management in solid state memory Physics 0 Active
US11086565B2 Reducing effects of read array operations of read apparent voltage Physics 0 Active
US11880300B2 Generating multi-plane reads to read pages on planes of a storage die for a page to read Physics 0 Active
US10289304B2 Physical address management in solid state memory by tracking pending reads therefrom Physics 0 Active
US11048571B2 Selectively performing multi-plane read operations in non-volatile memory Physics 0 Active
US6940309B1 Programmable logic device with a memory-based finite state machine Physics 0 Expired
US10169145B2 Read buffer architecture supporting integrated XOR-reconstructed and read-retry for non-volatile random access memory (NVRAM) systems Physics 0 Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.