Microcontroller architecture for non-volatile memory
US11301176B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 23, 2020 |
| Grant date | Apr 12, 2022 |
| Priority date | — |
| Expiry date | Jul 2, 2040 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2211/5634
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A non-volatile memory system comprises a memory structure and a control circuit connected to the memory structure. The control circuit includes a programmable and reprogrammable microcontroller. The microcontroller has a first processor that executes instructions to coordinate sequences of voltages applied to the memory structure by a first circuit in order to perform memory operations. The microcontroller has a second processor that executes second instructions to control a second circuit to test conditions of the non-volatile memory cells in response to the voltages applied to the memory structure. The microcontroller may have a third processor that controls the flow of the memory operation and directs the first and second processors to execute the instructions. The instructions of the various processors may be updated, which provides for flexible flow, core operation control, and condition testing.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.