Power efficient multiply-accumulate circuitry
US11301545B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Jul 11, 2019 |
| Grant date | Apr 12, 2022 |
| Priority date | — |
| Expiry date | May 12, 2040 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06N3/084
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Disclosed herein includes a system, a method, and a device for multiply-accumulate operation. In one aspect, an input operand is received by control circuitry. In one aspect, the control circuitry determines a sparsity of the input operand, where the sparsity may indicate whether a value of the input operand has a predetermined value or not. In one aspect, the control circuitry determines a stationarity of the input operand, where the stationarity may indicate whether the value of the input operand changes over one or more clock cycles. In one aspect, the input operand is provided to multiply-accumulate circuitry as an input, according to the determined sparsity and stationarity of the input operand.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.