Timing control method and timing control circuit for display panel, driving device and display device
US11302233B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | May 26, 2020 |
| Grant date | Apr 12, 2022 |
| Priority date | — |
| Expiry date | May 26, 2040 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2370/08
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
The disclosure provides a timing control method and a timing control circuit for a display panel, a driving device, and a display device. The method includes: in respective display periods, supplying a data enable signal to a source driving circuit. The source driving circuit supplies a data signal to a plurality of sub-display regions under the control of the data enable signal. The data enable signal is switched between an active level and an inactive level, and the active levels of the data enable signal are in one-to-one correspondence with the plurality of sub-display regions of the display panel. The farther one of the plurality of sub-display regions from the source driving circuit, the longer time period, at an active level, of the data enable signal for controlling the source driving circuit to provide the data signal to at least one row of pixels in the sub-display region is.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.