Patent · US Active

Semiconductor circuit including an initialization circuit for initializing memory cells and clearing of relatively large blocks of memory

US11302378B2 · kind B2 · utility

0Cited by

18References

11Claims

0Family size

Assignee

International Business Machines Corporation · US

Inventors

Martin Bernhard Schmidt · Stuttgart, DE
Peter Altevogt · Ettlingen, DE
Wolfgang Gellerich · Eppelheim, DE
Juergen Pille · Stuttgart, DE
Christoph Raisch · Gerlingen, DE

Key dates

Filing date	Jul 7, 2020
Grant date	Apr 12, 2022
Priority date	—
Expiry date	Jul 7, 2040

Classification

Technology area (CPC G)Physics
CPC primaryG11C11/4097
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

The disclosure relates to an initialization circuit for initializing memory cells of a memory array. The individual memory cells are coupled to a common bit line of the memory array via at least one pass element of the individual memory cells. Each individual memory cell comprises a charge-based storage element including a capacitance. The initialization circuit activates the pass elements of a plurality of the memory cells to be initialized such that the capacitances of the plurality of memory cells are connected simultaneously to the common bit line. Further, aspects of the disclosure relate to a method for initializing memory cells and a semiconductor circuit.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.