Deep trench isolation structures resistant to cracking
US11302734B2 · kind B2 · utility
0Cited by
8References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 4, 2018 |
| Grant date | Apr 12, 2022 |
| Priority date | — |
| Expiry date | Sep 10, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10F39/8063
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method includes etching a semiconductor substrate to form a trench, filling a dielectric layer into the trench, with a void being formed in the trench and between opposite portions of the dielectric layer, etching the dielectric layer to reveal the void, forming a diffusion barrier layer on the dielectric layer, and forming a high-reflectivity metal layer on the diffusion barrier layer. The high-reflectivity metal layer has a portion extending into the trench. A remaining portion of the void is enclosed by the high-reflectivity metal layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.