Memory device with a multi-mode communication mechanism
US11303721B2 · kind B2 · utility
0Cited by
5References
20Claims
0Family size
Assignee
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Key dates
| Filing date | Oct 6, 2020 |
| Grant date | Apr 12, 2022 |
| Priority date | — |
| Expiry date | Oct 6, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04W88/16
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A memory device includes a communication circuit configured to communicate a first signal and a second signal; and a selection mechanism coupled to the communication circuit and configured to select between operating the communication circuit the first signal and the second signal (1) independent signals for separate memory operations or (2) a complementary set for a memory operation.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.