Patent · US Active

Interrupt signaling for directed interrupt virtualization

US11314538B2 · kind B2 · utility

6Cited by
26References
20Claims
0Family size

Assignee

Inventors

Key dates

Filing dateNov 6, 2020
Grant dateApr 26, 2022
Priority date
Expiry dateNov 6, 2040

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F2213/2414
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

An interrupt signal is provided to a target processor. An interrupt signal is received with an interrupt target ID identifying a processor as a target processor for handling the interrupt signal. The interrupt signal is forwarded to the target processor for handling. A translation of the interrupt target ID to a logical processor ID of the target processor is used to address the target processor directly. The bus attachment device updates a directed interrupt signal indicator of a directed interrupt signal vector assigned to the target processor in order to indicate that there is an interrupt signal addressed to the respective interrupt target ID to be handled.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.