Method for testing device under test and apparatus using the same
US11320483B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 4, 2020 |
| Grant date | May 3, 2022 |
| Priority date | — |
| Expiry date | Aug 4, 2040 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C29/56012
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
Provided is a test apparatus for testing a device under test (DUT), the apparatus operating at an operating frequency that is lower than an operating frequency of the DUT. The test apparatus includes a clock source which generates a clock according to the operating frequency of the test apparatus, a clock multiplier configured to multiply the generated clock source by a multiplication number which is set according to the operating frequency of the DUT and output a first clock for the DUT, a phase converter configured to shift a phase of the generated clock according to the multiplication number and output a plurality of second clocks having different phases, and a test pattern comparator configured to sequentially collect pieces of data from the DUT by sequentially applying the plurality of second clocks having different phases.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.