Patent · US Active

Method and system for manufacturing integrated circuit

US11320746B1 · kind B1 · utility

0Cited by

0References

20Claims

0Family size

Inventors

Haifeng Pu · Shanghai, CN
Ningqi Zhu · Shanghai, CN
Shengyuan Zhong · Shanghai, CN

Key dates

Filing date	Feb 5, 2021
Grant date	May 3, 2022
Priority date	—
Expiry date	Feb 5, 2041

Classification

Technology area (CPC H)Electricity
CPC primaryH10D89/814
WIPO fieldOptics
WIPO sectorInstruments

Abstract

The method for manufacturing an integrated circuit includes: obtaining measurement data according to a first group of overlay marks on a first wafer, where the first group of overlay marks are disposed in a first region on the first wafer; obtaining a first parameter set according to a first model and the measurement data; and projecting the first parameter set into a second region on a second wafer to obtain simulated compensation data, where the second region includes a second group of overlay marks whose quantity is greater than that of the first group of overlay marks.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.