Self-aligned gate endcap (SAGE) architecture having endcap plugs

US11329138B2 · kind B2 · utility

Assignee

• Intel Corporation · US

Inventors

• Sairam Subramanian · Dallas, US
• Christopher KENYON · Portland, US
• Sridhar Govindaraju · Hillsboro, US
• Chia-Hong Jan · Portland, US
• Mark Liu · West Linn, US
• Szuya S. Liao · Portland, US
• Walid M. Hafez · Portland, US

Key dates

• Filing date: Apr 2, 2018
• Grant date: May 10, 2022
• Expiry date: Jul 9, 2040

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D84/0135
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

Self-aligned gate endcap (SAGE) architectures having gate endcap plugs or contact endcap plugs, or both gate endcap plugs and contact endcap plugs, and methods of fabricating SAGE architectures having such endcap plugs, are described. In an example, a first gate structure is over a first of a plurality of semiconductor fins. A second gate structure is over a second of the plurality of semiconductor fins. A first gate endcap isolation structure is laterally between and in contact with the first gate structure and the second gate structure and has an uppermost surface co-planar with an uppermost surface of the first gate structure and the second gate structure. A second gate endcap isolation structure is laterally between and in contact with first and second lateral portions of the first gate structure and has an uppermost surface below an uppermost surface of the first gate structure.