Bypass circuitry to improve switching speed
US11329642B1 · kind B1 · utility
4Cited by
8References
22Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 15, 2021 |
| Grant date | May 10, 2022 |
| Priority date | — |
| Expiry date | Mar 15, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K17/04123
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Methods and devices to improve the switching speed of radio frequency FET switch stacks are disclosed. The described methods and devices are based on bypassing drain-sources resistors when the FET switch stack is transitioning from an ON to an OFF state. Several implementations of the disclosed teachings are also presented.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.