Patent · US Active

Semiconductor chip fabrication and packaging methods thereof

US11335648B2 · kind B2 · utility

0Cited by
2References
10Claims
0Family size

Assignees

Inventors

Key dates

Filing dateNov 27, 2019
Grant dateMay 17, 2022
Priority date
Expiry dateJan 30, 2040

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH01L2924/35121
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

A method for fabricating a semiconductor structure is provided. The method includes forming a semiconductor chip; providing a printed circuit board; and forming an adhesive layer between a connection surface of the semiconductor chip and the printed circuit board to bond the semiconductor chip with the printed circuit board. The semiconductor chip includes a plurality of cutting tracks intersected with each other to enclose an area having corner regions. The connection surface of the semiconductor chip includes a plurality of conductive bumps and a plurality of first openings are formed in each of the corner regions.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.