Semiconductor device and method of fabricating the same
US11335679B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 20, 2020 |
| Grant date | May 17, 2022 |
| Priority date | — |
| Expiry date | Jun 24, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/83
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Disclosed are a semiconductor device and a method of fabricating the same. The semiconductor device includes first and second gate patterns that are spaced apart from each other in a first direction on a substrate and extend in the first direction, a separation pattern that is disposed between and being in direct contact with the first and second gate patterns and extends in a second direction intersecting the first direction, a third gate pattern that is spaced apart in the second direction from the first gate pattern and extends in the first direction, and an interlayer dielectric layer disposed between the first gate pattern and the third gate pattern. The separation pattern includes a material different from a material of the interlayer dielectric layer. A bottom surface of the separation pattern has an uneven structure.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.