Semiconductor switching devices having ferroelectric layers therein and methods of fabricating same
US11335701B2 · kind B2 · utility
0Cited by
7References
11Claims
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Key dates
| Filing date | Feb 3, 2020 |
| Grant date | May 17, 2022 |
| Priority date | — |
| Expiry date | Feb 3, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/853
- WIPO fieldMicro-structural and nano-technology
- WIPO sectorChemistry
Abstract
A semiconductor device includes a substrate, a channel on or in the substrate, a source/drain pair respectively on opposite ends of the channel, and a gate structure on the channel between the source/drain pair, wherein the gate structure includes an interfacial layer, a ferroelectric layer, a stabilization layer, an oxygen diffusion barrier layer, and a threshold voltage control layer that are sequentially stacked on the channel.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.