Patent · US Active

Distributed interrupt priority and resolution of race conditions

US11341069B2 · kind B2 · utility

0Cited by

3References

20Claims

0Family size

Assignee

Advanced Micro Devices, Inc. · US

Inventors

Bryan P. Broussard · Austin, US
Paul James Moyer · Fort Collins, US
Eric Christopher Morton · Austin, US
Pravesh Gupta · Bengaluru, IN

Key dates

Filing date	Oct 12, 2020
Grant date	May 24, 2022
Priority date	—
Expiry date	Oct 12, 2040

Classification

Technology area (CPC G)Physics
CPC primaryG06F2212/1008
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

A method of operating a processing unit includes storing a first copy of a first interrupt control value in a cache device of the processing unit, receiving from an interrupt controller a first interrupt message transmitted via an interconnect fabric, where the first interrupt message includes a second copy of the first interrupt control value, and if the first copy matches the second copy, servicing an interrupt specified in the first interrupt message.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.