Analog arithmetic unit
US11347478B2 · kind B2 · utility
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3References
18Claims
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Key dates
| Filing date | Feb 22, 2019 |
| Grant date | May 31, 2022 |
| Priority date | — |
| Expiry date | Feb 22, 2039 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06J1/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The present disclosure describes a mixed signal arithmetic logic unit configured to use a combination of analog processing elements and digital processing elements in a cohesive manner. Depending on the signals and the data received for processing, the analog processing elements and digital processing elements may be used separately, independently or in combination to optimize computational results and the performance of the mixed signal arithmetic logic unit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.