Memory device, controller controlling the same, memory system including the same, and operating method thereof
US11348623B2 · kind B2 · utility
2Cited by
6References
20Claims
0Family size
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Key dates
| Filing date | Apr 13, 2021 |
| Grant date | May 31, 2022 |
| Priority date | — |
| Expiry date | Apr 13, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K7/02
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method of operating a memory device includes receiving a training request for a data channel, detecting at least one mode parameter according to the training request, transmitting the detected mode parameter to an external device, setting at least one of an NRZ mode and a PAM4 mode to a transmission signaling mode based on mode register set setting information from the external device, and performing communications with the external device according to the set transmission signaling mode.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.