Patent · US Active

Shared multi-port memory from single port

US11348624B1 · kind B1 · utility

4Cited by

2References

20Claims

0Family size

Assignee

XILINX, INC. · US

Inventors

Richard L. Walke · Edinburgh, GB
John McGrath · Tipperary, IE

Key dates

Filing date	Mar 23, 2021
Grant date	May 31, 2022
Priority date	—
Expiry date	Mar 23, 2041

Classification

Technology area (CPC G)Physics
CPC primaryG11C7/1045
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

Embodiments herein describe a multi-port memory system that includes one or more single port memories (e.g., a memory that can perform only one read or one write at any given time, referred to as a 1W or 1R memory). That is, the multi-port memory system can perform multiple read and writes in parallel (e.g., 1R/1W, 1R/3W, 2R/2W, 3R/1W, etc.) even though the memory in the system can only perform one read or one write at any given time. The advantage of doing so is a reduction in area and power.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.