Method of manufacturing semiconductor devices with multiple silicide regions
US11348839B2 · kind B2 · utility
4Cited by
11References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 31, 2019 |
| Grant date | May 31, 2022 |
| Priority date | — |
| Expiry date | Dec 5, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/0193
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device with multiple silicide regions is provided. In embodiments a first silicide precursor and a second silicide precursor are deposited on a source/drain region. A first silicide with a first phase is formed, and the second silicide precursor is insoluble within the first phase of the first silicide. The first phase of the first silicide is modified to a second phase of the first silicide, and the second silicide precursor being soluble within the second phase of the first silicide. A second silicide is formed with the second silicide precursor and the second phase of the first silicide.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.