Semiconductor device structure with recessed spacer
US11348841B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 28, 2020 |
| Grant date | May 31, 2022 |
| Priority date | — |
| Expiry date | Aug 28, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/0158
Abstract
A semiconductor device structure is provided. The semiconductor device structure includes a substrate. The semiconductor device structure includes a gate stack over the substrate, wherein the gate stack has a first portion and a second portion under the first portion, and the first portion is wider than the second portion. The semiconductor device structure includes a first spacer and a second spacer over opposite sides of the gate stack. The first spacer has a first upper portion and a first lower portion, the second spacer has a second upper portion and a second lower portion. The first spacer has a first recess, the first upper portion is between the first recess and the gate stack, the first lower portion is under the first recess, and the first recess has a first inner wall facing away from the gate stack.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.