Yi-Ren Chen
31Patents
5h-index
50Co-inventors
72Inventor score
Filing activity: Mar 24, 1997 → Jan 11, 2023
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US8742492B2 | Device with a vertical gate structure | Electricity | 15 | Active |
| US5878096A | Digital filter having phase-adjustment ability | Electricity | 12 | Expired |
| US8969949B2 | Structure and method for static random access memory device of vertical tunneling field effect transistor | Electricity | 7 | Active |
| US8835294B2 | Method for improving thermal stability of metal gate | Electricity | 7 | Active |
| US9111780B2 | Structure and method for vertical tunneling field effect transistor with leveled source and drain | Electricity | 7 | Active |
| US9627268B2 | Method for fabricating semiconductor device | Electricity | 5 | Active |
| US9406669B2 | Method and structure for vertical tunneling field effect transistor and planar devices | Electricity | 4 | Active |
| US10177238B2 | High-K film apparatus and method | Electricity | 3 | Active |
| US10103253B2 | Structure and method for vertical tunneling field effect transistor with leveled source and drain | Electricity | 2 | Active |
| US11101371B2 | Structure and method for vertical tunneling field effect transistor with leveled source and drain | Electricity | 1 | Active |
| US9147736B2 | High-K film apparatus and method | Electricity | 1 | Active |
| US8000352B2 | Synchronizer for communication device and access point | Electricity | 1 | Active |
| US9123745B2 | Device with a vertical gate structure | Electricity | 1 | Active |
| US11320710B2 | Pixel array substrate | Physics | 1 | Active |
| US8166377B2 | Configurable hierarchical comma-free reed-solomon decoding circuit and method thereof | Electricity | 1 | Active |
| US11348841B2 | Semiconductor device structure with recessed spacer | Electricity | 0 | Active |
| US10852609B2 | Pixel array substrate and driving method thereof | Physics | 0 | Active |
| US10147649B2 | Semiconductor device structure with gate stack and method for forming the same | Electricity | 0 | Active |
| US12040237B2 | Semiconductor device structure with spacer | Electricity | 0 | Active |
| US10861954B2 | High-K film apparatus and method | Electricity | 0 | Active |
| US11126050B2 | Pixel array substrate | Physics | 0 | Active |
| US12419104B2 | Semiconductor device and method of forming the same | Electricity | 0 | Active |
| US11194204B2 | Pixel array substrate | Physics | 0 | Active |
| US11126051B2 | Pixel array substrate | Physics | 0 | Active |
| US10763178B2 | Semiconductor device structure | Electricity | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.