Nonvolatile memory device
US11348931B2 · kind B2 · utility
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3References
20Claims
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Key dates
| Filing date | Jan 7, 2020 |
| Grant date | May 31, 2022 |
| Priority date | — |
| Expiry date | Dec 5, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B41/50
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A nonvolatile memory device includes a cell array formed on a substrate, and a control gate pickup structure, wherein the cell array comprises floating gates, and a control gate surrounding the floating gates, wherein the control gate pickup structure comprises a floating gate polysilicon layer, a control gate polysilicon layer surrounding the floating gate polysilicon layer and connected to the control gate, and at least one contact plug formed on the control gate polysilicon layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.