Memory latency reduction in XIP mode
US11366774B2 · kind B2 · utility
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14References
18Claims
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Key dates
| Filing date | Sep 24, 2020 |
| Grant date | Jun 21, 2022 |
| Priority date | — |
| Expiry date | Sep 24, 2040 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/7203
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method of controlling a read request can include: receiving, in a host device, the read request from a bus master, where the host device is coupled to a memory device by an interface; determining a configuration state of the read request; comparing an attribute of the read request against a predetermined attribute stored in the host device; adjusting the configuration state of the read request when the attribute of the read request matches the predetermined attribute; and sending the read request with the adjusted configuration state from the host device to the memory device via the interface.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.