Adesto Technologies Corporation
129Patents
128Active
129Granted
59Portfolio score
Filing activity: May 20, 2005 → Jul 18, 2022 · 10 expiring within 5 years
Most-cited patents
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US8331128B1 | Reconfigurable memory arrays having programmable impedance elements and corresponding methods | Physics | 40 | Active |
| US9165644B2 | Method of operating a resistive memory device with a ramp-up/ramp-down program/erase pulse | Physics | 24 | Active |
| US8687403B1 | Circuits having programmable impedance elements | Physics | 24 | Active |
| US7359236B2 | Read, write and erase circuit for programmable memory devices | Physics | 22 | Expired |
| US8426839B1 | Conducting bridge random access memory (CBRAM) device structures | Electricity | 19 | Active |
| US7514706B2 | Voltage reference circuit using programmable metallization cells | Physics | 17 | Active |
| US8107273B1 | Integrated circuits having programmable metallization cells (PMCs) and operating methods therefor | Physics | 17 | Active |
| US7426131B2 | Programmable memory device circuit | Physics | 16 | Active |
| US8654561B1 | Read methods, circuits and systems for memory devices | Physics | 16 | Active |
| US8437171B1 | Methods and circuits for temperature varying write operations of programmable impedance elements | Physics | 15 | Active |
| US8274842B1 | Variable impedance memory device having simultaneous program and erase, and corresponding methods and circuits | Physics | 13 | Active |
| US8941089B2 | Resistive switching devices and methods of formation thereof | Electricity | 13 | Active |
| US9812200B2 | Concurrent read and write operations in a serial flash device | Physics | 12 | Active |
| US8854873B1 | Memory devices, architectures and methods for memory elements having dynamic change in property | Physics | 12 | Active |
| US8294488B1 | Programmable impedance element circuits and methods | Electricity | 11 | Active |
| US7483294B2 | Read, write, and erase circuit for programmable memory devices | Physics | 10 | Active |
| US9053789B1 | Triggered cell annihilation for resistive switching memory devices | Physics | 10 | Active |
| US8866122B1 | Resistive switching devices having a buffer layer and methods of formation thereof | Electricity | 10 | Active |
| US10042587B1 | Automatic resumption of suspended write operation upon completion of higher priority write operation in a memory device | Physics | 10 | Active |
| US8625331B1 | Methods of programming and erasing programmable metallization cells (PMCs) | Physics | 10 | Active |
| US10539989B1 | Memory device alert of completion of internally self-timed power-up and reset operations | Emerging Cross-Sectional Technologies | 9 | Active |
| US8895953B1 | Programmable memory elements, devices and methods having physically localized structure | Electricity | 9 | Active |
| US9361975B2 | Sensing data in resistive switching memory devices | Physics | 9 | Active |
| US9029829B1 | Resistive switching memories | Physics | 9 | Active |
| US8659931B1 | Erase and soft program within the erase operation for a high speed resistive switching memory operation with controlled erased states | Physics | 9 | Active |
Source: USPTO / EPO open patent data. Counts and citation impact are objective bibliographic measures.